Platform Summary
ArcticLink is a programmable solution platform designed specifically to meet the unique connectivity requirements of handheld devices.
With the explosion of new handheld applications and devices, customers are demanding multiple functions to be performed at optimal levels by a single device. As a result, designers of handheld products such as Smartphones, Personal Media Players and Portable Navigation Devices are faced with the challenge of integrating enhanced wireless connectivity and digital storage features, among others.
ArcticLink addresses these issues in two ways: first by providing hardwired building blocks such as Hi-Speed USB 2.0 On-The-Go (OTG), SD, SDIO, MMC and CE-ATA, and secondly with an embedded, ultra-low power array of Customizable Building Blocks (CBBs) for additional connectivity and custom functions.
The flexible programmable fabric up to 20 CBBs combined with the hardwired building blocks provides a compact, single-chip solution that reduces BOM costs, saves board space, eases system-level design trade-offs and increases the end product’s time-to-market.
ArcticLink Solution Platform has two small package options; 8x8mm package for space constrained application and 12x12mm package for high pin count applications. Wafer level CSP is also available.
What is a CBB?
A customizable building block (CBB) is a unit of measurement that represents the on-chip logic that can be used to implement a variety of proven system blocks such as SDIO, PCI, IDE, CE-ATA and NAND Flash controller, to name a few, or custom logic or other system level functions.
Block Diagrams
ArcticLink Platform Architecture
Platform Features and Benefits
Hi-Speed USB 2.0 On-The-Go (OTG) Controller with PHY
High performance data transfers improves consumer experience and improves overall battery life
High Speed SD/SDIO/MMC/CE-ATA host controller
Flexible host controller can be configured for connectivity and control of varying mobile peripheral and memory technology
20 Customizable Building Blocks
Ideal for enabling hardware/software platforms to support multitude of future product requirements or for tailoring CSSP to exact requirements
On-Chip SRAM, FIFO and DMA Controllers
Autonomous data transfers reduce application processor overhead
Proven System Block Options available for QuickLogic CSSP platforms
| Storage |
| IDE/P-ATA Host Controller supports |
- All 1” and 1.8” IDE/P-ATA HDDs
- Data throughput of up to 33 MByte/sec with UDMA
- Lower processor overhead for ATA timing and polling operation
|
| CE-ATA Host Controller supports |
- 4-bit and 8-bit CE-ATA HDDs
- CE-ATA 1.1 compliant peripheral interface at speeds up to 52 MHz
- Hardware implementation for CMD-60 and CMD-61 to lower host processor overhead
|
| NAND Flash Controller supports |
- Single Level Cell (SLC) NAND flash with 2-bit hardware ECC/EDC
- Hardware support for wear leveling and bad block management
|
| Secure Digital (SD) Card Host Controller supports |
- Secure Digital 2.0 standard with support for Secure Digital High Capacity (SDHC)
- 1-bit and 4-bit operation at speeds of up to 52 MHz
|
| Compact Flash (CF) Host Controller supports |
- 8-bit and 16-bit Compact Flash interface
- Memory and I/O modes for CF card and peripherals
- True IDE mode for CF micro hard drives
|
| Multimedia Card (MMC) Controller supports |
- MMC 4.1 standard for MMC and high capacity SIM card
- 1-bit, 4-bit, 8-bit operation with speeds up to 52 MHz
|
| Memory Stick (MS) Controller supports |
- Memory Stick and Memory Stick Pro standards
- Theoretical maximum data transfer rate of 480 Mbps
- 4-bit, 8-bit and serial interface widths
|
| Managed NAND Controller with Boot Capability supports |
- Elimination of the need for NOR Flash in the system
- Booting from any SD/MMC-based Managed NAND device with
support for SDHC devices of 4 GBytes and above
- SD/MMC controller is SD 2.0 compliant with support for SDHC devices for Managed NAND densities of 4 GBytes and above
- Supports the latest eMMC standard
- Supports multiple SD/SDIO/MMC devices or cards on the same bus
|
| Optical Drive Controller (ATAPI) supports |
- CD and DVD ROM connectivity (ATAPI)
- Enhanced support for simultaneous DVD ROM and hard disk drives
- Throughput of greater than 13 MByte/sec
- Off-loading the application processor from managing the overhead of ATA timing and polling operations
|
| Network |
Hi-Speed USB Controller supports
|
- Hi-speed USB 2.0 OTG with integrated high-speed PHY
- 12-signal ULPI interface available through programmable fabric
- 8 KByte SRAM on-chip buffer to improve data transfer performance
- Dedicated DMA controller to off-load CPU from heavy data transfer and manipulation
|
| High-Speed SDIO Controller supports |
- High-speed SDIO host controller with clock frequency up to 52 MHz
- Compliance with the latest Secure Digital 2.0 standard
- SPI, 1-bit and 4-bit modes
- Rx/Tx FIFOs for higher performance and throughput
- DMA support for reducing processor bus utilization
|
| MiniPCI for Ethernet, Wi-Fi/WiMAX Controller supports |
- Leveraging of low-cost PCI-based Wi-Fi modules
- Up to 264 MByte/sec PCI bus performance, zero wait states
- Master and target functions for 32-bit data at speeds of 33 and 66 MHz
- Full compliance to PCI specification 2.3, and Cardbus and Compact
PCI compatible
|
| SPI Controller supports |
- High-speed SPI master controller with clock frequency up to 52 MHz
- Low cost, low pin count wireless connectivity solution
- Simple driver architecture customizable to enhance Wi-Fi performance
|
| Bluetooth 2.x + EDR High-Speed UART supports |
- High-speed UART supporting Bluetooth 2.x with up to 4 Mbit/sec data rate
- Configurable baud rate customized for different application requirements
- Configurable flow control and FIFO access
|
| SDIO Client supports |
- SD v2.0 and SDIO v1.2 compliance with multifunction SDIO support
- SD 1 bit, SD 4 bit and SPI mode up to 50 MHz
- Hot insertion/removal, interrupt, Read Wait, Suspend, and Resume
- CRC7/CRC16
|
| USB Hub supports |
- Hi-Speed USB upstream port with built-in Hi-Speed USB PHY
- Each downstream port supporting Full-Speed at 12 MByte/sec
and Low-Speed at 1.5 Mbit/sec operation
- Customizable number of downstream ports
- Transaction Translator (TT) optimized for maximum bandwidth
utilization
|
| Video and Imaging |
Visual Enhancement Engine (VEE™) supports |
- TV-quality visual experience in mobile devices through dynamic range control
- Greatly enhanced image and video quality even under low backlight or bright ambient conditions
- Dramatically improved battery life by reducing backlight
|
| MIPI DSI with Built-in D-PHY supports |
- Display standard develop by the MIPI alliance; up to WVGA resolution
- Serial interface to reduce pin count, power and cost
- Lower noise and much improved reliability through hinge of clamshell, swivel and slider phones
|
| X/Y Swap supports |
- X/Y Swap Operation
- Frame rate conversion for VGA, NTSC and PAL
- Power management for stopping all subsystem clocks and shutting
down the SDRAM frame buffer
- Configuration from the host application processor via I2C-compatible bus
|
| High-definition LCD Controller supports |
- Configurable resolution up to 1024x768
- Programmable display aspect ratio
- Configurable vertical and horizontal scan frequencies
- Maximum color depth of 24 bits per pixel
- Embedded SRAM/(Mobile) SDRAM/DDR-SDRAM controller for
frame buffer
|
| Intelligence |
| Direct Memory Access (DMA) supports |
- Fully customizable DMA controller
- Lower CPU utilization
|
| Smart Data Transfer (SDT) supports |
- Onboard intelligence that enables direct port-to-port data transfers, without involving the host CPU bus
- Significantly improved speed for large file transfer, enhancing user experience and increasing battery life
|
| Data Aggregator (DA) supports |
- Aggregation of multiple, independent data paths
- Interface-standard agnostic via multiple proven system blocks and programmable fabric
- Significantly simplified connections to multiple standard devices via one data pipe to host
|
| Security and Custom Options |
| Content Protection for Recordable Media (CPRM) supports |
- C2 cipher algorithm implemented in hardware
- Working in conjunction with QuickLogic SD/SDIO or
P-ATA host controllers
- Key stored securely in hardware
- Optimization for SD-Video performance
|
| Serial ID supports |
- Secure numeric ID, as long as 256 bits can be implemented in the programmable fabric of any PolarPro or ArcticLink Solution Platform
- Unique number in each CSSP device controlled by a list of desired values provided by OEM/ODM
|
If you have questions for our CSSP device expert, please contact us. 