The Eclipse™ family of programmable devices offers a host of system-level features ideal for telecommunications, networking, computing and test applications that require a combination of high performance, high density and embedded RAM.
Flexible programmable logic with densities ranging from 250K to 580K system gatesHigh performance, feature-rich programmable device addresses the density requirements of FPGA and ASIC designers. |
Single chip solutionProvides instant-on capability, eliminates the need for external configuration memory and protects intellectual property from design theft and reverse engineering. |
Up to 36, 2,304-bit dual-port, high-performance SRAM blocksEmbedded dual-port SRAM and extended I/O support enables integration of several board-level components into a single chip. |
Embedded dual-port SRAM
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Programmable I/O
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