Programmable Logic Devices For Mobile Enterprise

The Ultra-Low Power, Integrated Programmable Connectivity Platform

The ArcticLink® CSSP Solution Platform family of programmable connectivity combines interconnect building blocks, such as Hi-Speed USB 2.0 OTG, SDIO and CE-ATA Host Controllers, with an embedded ultra-low power programmable fabric block, all in a single-chip solution. The combination of small form factor packaging, ultra-low power technology and host bus interface configurability makes this platform ideal for addressing emerging connectivity requirements in power critical portable and mobile consumer electronics applications.

Through the on-chip programmable fabric, the host bus interface can be tailored to expand the peripheral set of a broad variety of common mobile application processor families, to meet the emerging connectivity requirements for wired/wireless communications and media storage. With an innovative internal split bus architecture, the platform enables sustained and concurrent data transfers between slow- and high-speed peripherals, and to/from the common programmable fabric-based host interface.

ArcticLink block
UART,  USB Hub , SDIO/SPI,  MiniPCI CardBus
Video and Imaging
Mobile TV,  Display , Simultaneous TV-Out , MPEG 
GPIO , Security ID,  CPRM
Custom Options
Custom Logic
  • Integrated, single-chip solution provides multiple peripheral host controllers and interfaces

  • Flexible platform featuring hard logic and programmable fabric

  • Hi-Speed USB 2.0 On-the-Go (OTG) controller with PHY

  • High speed SD/SDIO/MMC/CE-ATA host controller 

  • Library of Proven System Blocks

  • On-chip SRAM, FIFO and DMA controllers

Ideal for Mobile Enterprise Devices

The ArcticLink CSSP is ideal for mobile enterprise devices to bridge interface standards and provide additional functionalities

Product Table

Device Family ArcticLink
QuickLogic Part Number QL1A100 QL1A100 QL1A100
Logic Cells 640 640 640
RAM module size 4K (4608) 4K (4608) 4K (4608)
Number of RAM modules 7 7 7
RAM bits 36,864 36,864 36,864
FIFO Controllers 7 7 7
PLLs 1 0 1
Distributed Clocks 5 5 5
I/O Flip-flops 267 261 381
Flip-flops 640 640 640
Max Gates 100,000 100,000 100,000
Max GPIOs 63 60 120
Core Voltage 1.8V 1.8V 1.8V
I/O Voltages 1.8V, 2.5V, 3.3V 1.8V, 2.5V, 3.3V 1.8V, 2.5V, 3.3V
Pin Count 110 121 196
Pitch (Ball/Lead) 0.4mm 0.65mm 0.8mm
Package Dimensions 5.76mm x 4.44mm 8mm X 8mm 12mm X 12mm
MSL 1 3 3

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