Chiplets (modular silicon “chips” mounted as die onto an interposer which interconnects them and attaches to a single package substrate) have been quietly but steadily taking market share from more traditional monolithic semiconductor devices. In fact, Transparency Market Research recently noted that “…the chiplet market is expected to exceed $47B by 2031, with a CAGR exceeding 40% annually.” That’s a lot of chiplets.
So why has this approach been so successful? A number of factors come into play. First (and most obvious) is the “mix-and-match” nature of the technology. End users can choose a specific processor (or set of processors), memory, I/O functionality, and mixed-signal technology or even their own ASIC or SoC to create a highly customized solution for their specific application. If a different need arises, or better technology becomes available, the whole solution is flexible and can be quickly reconstituted with different or newer chiplets.
For manufacturers, using a chiplet-based approach not only creates flexibility, but helps enhance yields and reduce costs as each chiplet component has a smaller die size, and hence higher yield, than would a larger monolithic device encompassing all of the same combined functionality. It also enables rapid product evolution as individual building blocks can be upgraded one at a time, typically much more quickly than redesigning a larger monolithic semiconductor. Finally, it allows chips from different process technologies to be combined and presented as a single device.
Not surprisingly, eFPGA technology is a great complement to chiplet technology. FPGAs are by their nature highly flexible, and eFPGA IP blocks are even more so since they can be configured by the customer. Turning those blocks into chiplets and integrating them with other chiplet-based functionality creates an island of reconfigurability for the rest of the devices on the interposer. Now not only can the different chiplets be mixed and matched, but the FPGA logic internal to the eFPGA chiplet can easily be reconfigured to meet whatever changing need the customer is addressing.
That’s why our recent announcement with eTopus is so significant. We provide the eFPGA technology and they provide the special high performance/low power interconnect that’s critical for many of the applications our customers have in mind. We’ll start with eFGPA/chiplet templates and then the plan is to move forward with a KGD (Known Good Die) approach.
Read press release at https://bit.ly/39KYi3E