Tiny, Low Cost SRAM Reprogrammable FPGAs with Open Source Tools
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SRAM FPGAs ideal for battery powered, low power reconfigurable applications. Supported both open source and our own proprietary software tools. We are proud to be the 1st Programmable Logic company to openly embrace Open Source FPGA tools through our QuickLogic Open Reconfigurable Computing initiative.
Our SRAM FPGAs are designed specifically for lowest system power. PolarPro3 and PolarPro 3E are ideal for battery powered applications requiring a level of flexibility or re-programmability such as bus interface logic, level shifting, small CPU cores, low speed serial protocols, and GPIO muxing applications commonly found in Consumer and Industrial IoT applications
Benefits
Solve the most challenging embedded systems architecture challenges through the use of small FPGAs - chip-to-chip connectivity, system power consumption, system latency, and time-to-market.
Features
- Reprogrammable SRAM technology
- Supported by Open Source FPGA tools
- Integrated embedded block RAM with dedicated FIFO controllers
Use Cases
- I/O Level shifting /expansion (interface to different bus or IO voltages)
- Bus Interfaces (MCU to memory, MCU 2 MCU, MCU to peripherals/Displays/I2C/I2S/SPI/UART/PWM)
PolarPro3 / PolarPro3E Documentation |
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Solution Platform Brief |
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Interprocessor Communications PSB PolarPro 3 PolarPro 3E |
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Data Sheet |
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PolarPro 3E Device Data Sheet PolarPro 3 Device Data Sheet SDIO Client PSB Data Sheet SDIO Host Controller PSB Data Sheet SPI Host Controller Data Sheet Wake-up and Verify PSB Data Sheet |
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White Paper |
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| QuickLogic's PolarPro 3 vs Lattice iCE40 Logic Cell Utilization | |||||||||||||||||||
Product Brief |
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IrDA Barcode Transmitter PSB Product Brief IrDA Remote Control PSB Tunable Antenna PSB |
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Application Note |
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| Quartz Crystal Oscillators with the Polar Pro | |||||||||||||||||||
PolarPro / PolarPro II Documentation |
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Solution Platform Brief |
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| Interprocessor Communications PSB | |||||||||||||||||||
Data Sheet |
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PolarPro Data Sheet PolarPro II Device Data Sheet PWM Pro Data Sheet SDIO Client PSB Data Sheet SDIO Host Controller PSB Data Sheet SPI Host Controller Data Sheet Wake-up and Verify PSB Data Sheet |
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White Paper |
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PolarPro, the Optimal Choice for Low Power Designs Programmable Fabric Power Concerns QuickLogic's CSSP Approach The Reliability of Amorphous Silicon |
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Product Brief |
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IrDA Remote Control PSB Tunable Antenna PSB |
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Application Note |
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| Quartz Crystal Oscillators with the Polar Pro | |||||||||||||||||||
QuickLogic SRAM Reprogrammable FPGAs for Consumer IoT and Industrial IoT
View Full DiagramApplications
- Low Power Battery backed equipment (consumer/wearable/portable & handheld)
- Aerospace/Military (extended temperature, Instant on & High reliability)
Ecosystem Partners
PolarPro3 Product Table |
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| Product | PolarPro 3 (WLCSP package) | PolarPro 3 (VFBGA package) | |||||||||||||||||
| Logic Cells | 1,019 | ||||||||||||||||||
| Effective Logic Cells | Average 2X vs Standard Logic Cells | ||||||||||||||||||
| RAM Module Size | 8K (9,216 bits) | ||||||||||||||||||
| Number of RAM Modules | 8 | ||||||||||||||||||
| RAM Bits | 73K | ||||||||||||||||||
| FIFO Controllers | 8 | ||||||||||||||||||
| Distributed Clocks | 5 | ||||||||||||||||||
| I/O Flip-flops | 164 | 220 | |||||||||||||||||
| Flip-flops | 1,019 | ||||||||||||||||||
| Max Gates | 175K | ||||||||||||||||||
| Max GPIOs | 18 | 46 | |||||||||||||||||
| Core Voltage | 1.2V | ||||||||||||||||||
| I/O Voltages | 1.8V, 2.5V, 3.3V | ||||||||||||||||||
| Pin Count | 30 | 64 | |||||||||||||||||
| Package | WLCSP | VFBGA | |||||||||||||||||
| Pitch (Ball/Lead) | 0.4mm | 0.4mm | |||||||||||||||||
| Package Dimensions | 2.09mm x 2.54mm | 3.5mm x 3.5mm | |||||||||||||||||
| MSL | 1 | 3 | |||||||||||||||||
PolarPro 3E Product Table |
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| Product | PolarPro 3E (WLCSP package) | ||||||||||||||||||
| Effective Logic Cells | 3,500 | ||||||||||||||||||
| RAM Module Size | 8K | ||||||||||||||||||
| Number of RAM Modules | 8 | ||||||||||||||||||
| RAM Bits | 204Kb | ||||||||||||||||||
| FIFO Controllers | 8 | ||||||||||||||||||
| Distributed Clocks | 5 | ||||||||||||||||||
| I/O Flip-flops | 164 | ||||||||||||||||||
| Flip-flops | 1,019 | ||||||||||||||||||
| Max Gates | 175K | ||||||||||||||||||
| Max GPIOs | 18 | ||||||||||||||||||
| Core Voltage | 1.2V | ||||||||||||||||||
| I/O Voltages | 1.8V, 2.5V, 3.3V | ||||||||||||||||||
| Pin Count | 30 | ||||||||||||||||||
| Package | WLCSP | ||||||||||||||||||
| Pitch (Ball/Lead) | 0.4mm | ||||||||||||||||||
| Package Dimensions | 2.19mm x 2.47mm | ||||||||||||||||||
| MSL | 1 | ||||||||||||||||||
